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Digital filter design (FIR) using FPGA in the loop

$250-750 USD

Chiuso
Pubblicato circa 7 anni fa

$250-750 USD

Pagato al completamento
I need help to run the project. I already have the whole project files but don't know how to run it. Just need a guidance how to run it. See the proposal attached here for more understanding of the project.
Rif. progetto: 13314039

Info sul progetto

10 proposte
Progetto a distanza
Attivo 7 anni fa

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10 freelance hanno fatto un'offerta media di $355 USD
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Hello! Please check my reviews to know a bit about me and my work. Thank you!
$300 USD in 2 giorni
5,0 (52 valutazioni)
5,6
5,6
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Hello Dear, I'm Mohamed saeed mechanical and aeronautical engineer. I'm Matlab expert with high experience. I checked your job description and I'm ready to do it.
$250 USD in 0 giorno
4,7 (26 valutazioni)
4,6
4,6
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Hello, I propose to complete your project with perfection right on time. Review and use the available description and resources in order to complete this project. We specialize in Website development and design, Android & IOS development and design, and also Software development. Please provide us with an opportunity to help you and you will be served nothing less than excellence.
$555 USD in 10 giorni
4,8 (1 valutazione)
3,8
3,8
Avatar dell'utente
Hi, I am good in VHDL/Verilog programming. I did couple of projects of designing fir filter using matlab and vhdl. I have also experience of using block RAM and floating point ip core in this kind of project. Please elaborate the exact input and output of the FPGA, sampling frequency and ADC quantization levels to proceed further. Will I have to set the filter coefficient or you will share the same? In case the first one, please share the filter specification like cuttoff frequency, passband and stopband ripple etc. Thanks, Mastor
$250 USD in 5 giorni
5,0 (5 valutazioni)
3,6
3,6
Avatar dell'utente
Hello, I am an electronics engineer having experience of more than 5 years in FPGA based system design. I can guide you on your code in $80.
$250 USD in 3 giorni
5,0 (7 valutazioni)
3,2
3,2
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I have a working experience of Xilinx FPGAs using Verilog HDL. I have designed different filters in verilog. i can offer you my services.
$250 USD in 3 giorni
0,0 (0 valutazioni)
0,0
0,0
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I have good handle on verilog and VHDL . I can help you with your project . Let me know if you are interested. I can try to complete as soon as possible
$555 USD in 10 giorni
0,0 (0 valutazioni)
0,0
0,0
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Project completed with the following way: 1)Filter will e designed via MATLAB. 2)Simulated via simulink 3)HDL code will be written for the filter. 4)HIL test environment will be prepared. 5)Test sitimulus applied to the board.
$250 USD in 10 giorni
0,0 (0 valutazioni)
0,0
0,0
Avatar dell'utente
Hi, I used to be the FAE in charge of this kind of stuff when I worked at Synplicity (before they were bought by Synopsis). Anyway... I'm a pro at this stuff. It seems you'll be spending 90% of the project budget just on getting everything setup. A digital filter is a trivially simple design. Talk to me a little bit more about what your goals are. Maybe I can help you.
$555 USD in 10 giorni
0,0 (0 valutazioni)
0,0
0,0

Info sul cliente

Bandiera: UNITED STATES
Fresno, United States
5,0
5
Membro dal nov 28, 2016

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