Sumit J.

1. 2 years of industry experience in design and verification of various digital systems. 2. Expertise in the RTL Design & Verification, development of Verification IP, Test Plan and Test Bench building. 3. Good knowledge in RISC Processor, AMBA APB3 and MIPI DSI protocols. 4. 6 weeks Higher Education Program (HEP) training from Mentor Graphics, Noida on “Verification of Electronics Design and Systems using System-Verilog”. 5. 4 weeks summer training from Ducat, Noida on “VLSI Technology”.