Sidharth Sankar P.

I am an ASIC verification engineer having PG Diploma in VLSI from CDAC ACTS Pune and [login to view URL] in Electronics and Communication engineering. Qualifications Post graduate diploma in VLSI from CDAC ACTS, PUNE with 81.5% in 2013. [login to view URL]. in Electronics and Communication from Biju Pattanaik University of Technology, Odisha with CGPA 8.27 in 2012 HSC from CHSE, Odisha with 72.66% in 2007 SSC from BSE, Odisha with 89.73% in 2005 Key Skills Languages : SystemVerilog, Verilog, VHDL Scripting : Linux Shell scripting, Baisc Perl Version-control : SVN, Perforce Protocols : AHB,SPI, I2C, JTAG, Wishbone FPGA Tools : Xilinx ISE Simulators : ModelSim, Questasim, Cadence Incisive simulator, VCS. Other tools : Enterprise Planner,Incisive Enterprise Manager, Reveal formal tool. Technical Skills : UVM, System Verilog Assertion, VIP Development.