Immagine di profilo di Vineetapsingh
Membro dal 13 aprile 2017
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I recently completed my Master's in Electrical Engineering and have started working full time. I have a passion for Writing, Art, and Travel. I enjoy all kinds of writing- from creative writing, writing reports, reviews, travel stories etc. For more information, please visit my website: [login to view URL]
$15 USD/hr
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  • immagine di Waleed B. Asic design - verilog/HDL code (Report) $100.00 USD

    “So patient and professional. one of the few good freelancer to count on. Surely I will hire again. Thank you so much”

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    “Very smart and very high educated person with a lot of great skills”


Master of Science

2013 - 2015 (2 years)


Reliable Low-Latency Viterbi Algorithm Architectures Benchmarked on ASIC and FPGA

This technical paper was authored by me in conjunction with my research on Fault detection algorithms. I applied those algorithms on the Viterbi decoder to make it more fault reliable.


  • US English Level 1


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