Direct Digital Frequency Synthesizer(DDFS) -- 2

₹600-1500 INR

Completato

Pubblicato

circa 3 anni fa

₹600-1500 INR

Pagato al completamento

What is DDFS , working of DDFS? Verilog/vhdl code for DDFS. I need some explanation and modification of the code.

Matlab and Mathematica

Verilog / VHDL

Electrical Engineering

FPGA

Very-large-scale integration (VLSI)

Rif. progetto: 29485608

Info sul progetto

3 proposte

Progetto a distanza

Attivo 3 anni fa

Hai voglia di guadagnare un po'?

Indirizzo Email

I vantaggi delle offerte su Freelancer

Imposta il tuo budget e le scadenze

Fatti pagare per il lavoro svolto

Delinea la tua proposta

La registrazione e le offerte sui lavori sono gratuite

Assegnato a:

@IslamAdam998

Dear sir, I am a digital design engineer expert in FPGA and ASIC design flows using Verilog and VHDL programming. Also, I am experienced with Vivado, ISE, Vivado IPs, SDK, Quartus, DC Compiler, ICC and others. Please contact me to discuss more about this project. Thanks.

₹600 INR in 7 giorni

5,0

(5 valutazioni)

2,3

3 freelance hanno fatto un'offerta media di ₹1.367 INR

@moaazkh96

hi, I am a senior digital design engineer, I have a wide knowledge of digital design in ASIC and FPGA using both VHDL and Verilog. I am using Vivado, ISE and Quartise for FPGA. and DC, ICC and prime-time for ASIC. I will provide you a professional report about your project with citation and scientific formatting. Please contact me to know more about your needs. Regards, moaaz.

₹2.000 INR in 7 giorni