Verilog HDL Project
$30-250 USD
Pagato alla consegna
Design a UART module to interface it with a PC
Rif. progetto: #16568127
Info sul progetto
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16 freelance hanno fatto un'offerta media di $79 per questo lavoro
Dear sir I have more than 10 years experience in digital design using FPGA, please check my profile, also please message me so that we can discuss Best regards
Hello! Please check my reviews/profile to know more about me and my work. I have been doing such projects since a long time and should be able to help you out. Thank you!
Hi, I hope you are doing well and enjoying digital design.I believe implementing a design right form modeling until verifying it on an FPGA is always a very special experience. I have an already-built UART TX/RX mo Altro
Dear Sir, This Ahmed Zaky a senior Digital VLSI engineer. I am experienced in ASIC and FPGA flows using Verilog HDL. I can do your work with minimal prices and yet guarantee 100% satisfaction. Please send me PM fo Altro
I respect client's values and time. I work with motivation and always meet deadlines. I never compromise on quality and give my 100% to the work.
I have designed a UART module with parameterized speed variations (9600 bps - 115200bps) before and I have a great experience in verilog designs. Therefore I assure to complete this project within two days and and deli Altro