Verilog HDL Project

Completato Pubblicato 6 anni fa Pagato alla consegna
Completato Pagato alla consegna

Design a UART module to interface it with a PC

Ingegneria Elettrica Elettronica FPGA Microcontrollore Verilog / VHDL

Rif. progetto: #16568127

Info sul progetto

16 proposte Progetto a distanza Attivo 5 anni fa

Assegnato a:

$35 USD in 1 giorno
(4 valutazioni)
3.7

16 freelance hanno fatto un'offerta media di $79 per questo lavoro

ahmedmohamed85

Dear sir I have more than 10 years experience in digital design using FPGA, please check my profile, also please message me so that we can discuss Best regards

$88 USD in 1 giorno
(488 valutazioni)
8.1
raulbehl

Hello! Please check my reviews/profile to know more about me and my work. I have been doing such projects since a long time and should be able to help you out. Thank you!

$100 USD in 3 giorni
(87 valutazioni)
6.3
mastor31

A proposal has not yet been provided

$100 USD in 5 giorni
(19 valutazioni)
5.1
EslamElGeddawy

Hi, I hope you are doing well and enjoying digital design.I believe implementing a design right form modeling until verifying it on an FPGA is always a very special experience. I have an already-built UART TX/RX mo Altro

$100 USD in 2 giorni
(7 valutazioni)
4.5
Ahmed1Zaky

Dear Sir, This Ahmed Zaky a senior Digital VLSI engineer. I am experienced in ASIC and FPGA flows using Verilog HDL. I can do your work with minimal prices and yet guarantee 100% satisfaction. Please send me PM fo Altro

$30 USD in 1 giorno
(5 valutazioni)
3.0
hafsathaizeen

A proposal has not yet been provided

$155 USD in 3 giorni
(0 valutazioni)
0.0
mario851108

Amplia Experiencia en programación de tarjetas basys con lenguaje VHDL

$30 USD in 3 giorni
(0 valutazioni)
0.0
sidmehmood

I respect client's values and time. I work with motivation and always meet deadlines. I never compromise on quality and give my 100% to the work.

$155 USD in 3 giorni
(0 valutazioni)
0.0
danukaravishan

I have designed a UART module with parameterized speed variations (9600 bps - 115200bps) before and I have a great experience in verilog designs. Therefore I assure to complete this project within two days and and deli Altro

$35 USD in 2 giorni
(0 valutazioni)
0.0