FPGA Design Implementation

I am looking at an FPGA project using xilinx the project has very specific functions that i do not have the skills required to implement it myself sadly so i hope you can help with that. The project is for a crypto miner that can mine using the cryptonote algorithm Variant 1 i have chosen a model of FPGA as it has 100k logic gates and good memory i have estimated the solutions a second for this unit to be around 4000-5000 sols/second which i think is achievable. I have put together some reference material for you to look at to see if you are able to implement it. The project needs to be a complete project from start to finish so i can flash the program to the off the shelf FPGA and set the unit to mine. I have a few ideas that i would like to discuss these include being able to daisy chain the units in blocks of 10 with 1 unit being the control unit that can send and receive data through the ethernet to all the units to handle hash functions supplied by the mining pools and also to make the unit look like 1 unit the reason for this is there is a limit to the amount of connections a pool will let you have before needing a proxy to handle over 100 connections. The unit needs to be able to handle AES, Keccak 1600, Blake-256, Groestl-256, JH-256, and Skein-256 these are the encryptions used to solve the hash functions to achieve a correct answer. It will need a html interface so i can put pool login details into the unit that controls all units. All information is open source so easily available. Reference Material: This is the hash function list for solving the hash for variant 1 Algo [login to view URL] This is how the hash function is done [login to view URL] If you have any questions please feel free to contact me.