to design I2C master on altera MAX10
$30-250 CAD
Pagato alla consegna
Taking reading from ADC and display it on I2C LCD on Altera MAX10. ADC should be designed using Qsys. MAX10(i2c master) is connected to i2c LCD (Slave) to display the value.
Rif. progetto: #12097053
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5 freelance hanno fatto un'offerta media di $115 per questo lavoro
Dear sir I have more than 9 years experience in digital design using VHDL, please check my profile, also please message me
Hi, -FPGA design engineer since last 7 years -Expertise in verilog/VHDL Please find below details of the projects TSMAC Hardware acceleration(3months) The project is to develop hardware acceleration block for TS Altro